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12ASX2 bảng dữ liệu(PDF) 25 Page - Infineon Technologies AG

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Giải thích chi tiết về linh kiện  Single Channel Isolated Driver for Inverter Systems AD Step
PDF  147 Pages
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12ASX2 bảng dữ liệu(HTML) 25 Page - Infineon Technologies AG

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EiceDRIVER
™ SIL
1EDI2002AS
Functional Description
Datasheet
25
Rev. 3.1, 2015-07-30
Hardware Description
2.4.4.2
General Operation
The SPI interface of the 1EDI2002AS supports full duplex operation. The interface relies on four communication
signals:
•
NCS: (Not) Chip Select.
•
SCLK: Serial Clock.
•
SDI: Serial Data In.
•
SDO: Serial Data Out.
The SPI interface of the 1EDI2002AS supports slave operation only. An SPI master (typically, the main
microcontroller) is connected to one or several 1EDI2002AS devices, forming an SPI bus. Several bus topologies
are supported.
A regular SPI bus topology can be used where each of the slaves is controlled by an individual chip select signal
(Figure 2-6). In this case, the number of slaves on the bus is only limited by the application’s constraints.
Figure 2-6 SPI Regular Bus Topology
In order to simplify the layout of the PCB and to reduce the number of pins used on the microcontroller’s side, a
daisy chain topology can also be used. The chain’s depth is not limited by the 1EDI2002AS itself. A possible
topology is shown Figure 2-7.
SCLK
Master
SDO
SDI
NCS1
SCLK
SDI
SDO
NCS
Slave 1
SCLK
SDI
SDO
NCS
Slave 2
SCLK
SDI
SDO
NCS
Slave n
NCSn
NCS2



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