12ASX2 datasheet(44/147 Pages) INFINEON

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EiceDRIVER

™ SIL

1EDI2002AS

Functional Description

Datasheet

Rev. 3.1, 2015-07-30

Hardware Description

Pulse Suppressor

In order to increase the device’s robustness against external disturbances, a pulse suppressor can be enabled by

setting bit SCFG.PSEN. Register SRTTOF shall also programmed with a value higher than 2

H. When a PWM turn-

on sequence occurs, the activation of the output stage is delayed by the programmed TTOFF number of cycles,

as for a normal TTOFF sequence. However, the PWM command received by the secondary chip signal is

internally sampled at every SSOSC cycle before the actual turn-on command is executed by the output stage. If

at least one of the sampling point does not detect a high level, the turn-on sequence is aborted and the device is

not switched on.

In case a valid PWM ON command is detected by the secondary side after the decision point the previous

sequence has been aborted, a new turn-on sequence is initiated.

One of the consequence of activating the pulse suppressor is that all PWM pulses shorter than the programmed

TTOFF plateau time are filtered out (Figure 2-15).

Note: The Pulse Suppressor only acts on turn-on pulses, not on turn-off pulses.

Figure 2-15 TTOFF: pulse suppressor aborting a turn-on sequence

tPULSE < tTTOFF+ 2 . tSSOSC

Input Pulse

Output Pulse

Pulse filtered out

SCFG.PSEN=1b

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