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DB929B bảng dữ liệu(PDF) 37 Page - CML Microcircuits |
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DB929B bảng dữ liệu(HTML) 37 Page - CML Microcircuits |
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37 / 51 page ![]() 4-Level FSK Modem Data Pump Page 37 of 50 MX929B PRELIMINARY INFORMATION ©2001 MX-COM, INC. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 20480171.003 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies. Note: during this time the µC may perform other functions, as the µC variable 'STATE' is updated by the interrupt service routine Disable µC's MX929B Rx Interrupt Service Routine Enable µC's MX929B Rx Interrupt Service Routine Set µC variable 'STATE' to 0 Set the Mode Register IRQEN bit to '1' Set the Mode Register IRQEN bit to '0' Read the Status Register Write a RESET task to the Command Register Ensure that the Control Register has been loaded with suitable CKDIV, FSTOL, LEVRES and PLLBW values Wait until the received carrier has been present for at least 8 symbol times Write a SFP task to the Command Register with the AQSC and AQLEV bits set to '1' Ensure that the Mode Register IRQEN, PSAVE, RXEYE, TX/ , and SSIEN bits are '0', and the INVSYM bit is set appropriately RX Yes Yes Yes No No No END with error END START 'STATE' < 4 ? BFREE bit = 1 ? 'STATE' = 4 ? Figure 21: Receive Frame Example Flowchart, Main Program Notes 1. The RESET command in Figure 21 and the practice of disabling the MX929B’s IRQ output when not needed are not essential but can eliminate problems during debugging and if errors occur in operation. 2. The CRC and TXIMP bits should be set appropriately every time a byte is written to the Command Register. |
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