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AN3023 bảng dữ liệu(PDF) 16 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Using the analog-to-digital converter of the STM8A microcontroller
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AN3023 bảng dữ liệu(HTML) 16 Page - STMicroelectronics

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Configuring ADC registers for conversion
AN3023
16/23
Doc ID 16113 Rev 1
Synchronization between two ADCs
This feature can be applied only if the device contains both ADC modules (ADC and ADC2).
The synchronization mechanism can only be used for single conversion and can be
triggered either by software or by hardware.
To start the synchronous conversion, the ADSE bit must be set to ‘1’ in the CR3 registers of
both ADC and ADC2.
When the ADS bit of the master ADC module is set, or another event triggers a conversion
on the master ADC module, a conversion on the slave module (ADC2) is triggered
synchronously.
Example 7
●
fMASTER = 4 MHz
●
fADC = fADC2 = 2 MHz
●
Channels: AIN2 on ADC and AIN1 on ADC2
●
Left alignment
●
Starting ADC and ADC2 by software
For Example 7, the ADC registers should be configured as follows:
//ADC2 setting - SLAVE
ADC2_CSR:CH[3:0] = 0001
→ AIN1 channel
ADC2_CR1 ADON = 1;
→ ADC2 power on
Wait (14/fADC) → stabilization time before starting the conversion
//ADC setting - MASTER
ADC_CSR:CH[3:0] = 0010 AIN2 channel
ADC_CR1 ADON = 1;
→ ADC power on
Wait (14/fADC) → stabilization time before starting the conversion
ADC_CR3:ADSE = 1; //enable sync on ADC
ADC2_CR3:ADSE = 1; //enable sync on ADC2
ADC_CR3:ADS = 1; //ADS start trigger, parallel conversion is started
Note:
Before starting synchronization conversion, the two ADC modules have to be programmed
with the same clock prescaler values. It is recommended to program the prescaler register
before switching on the ADCs.



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