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AN4337 bảng dữ liệu(PDF) 6 Page - STMicroelectronics |
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AN4337 bảng dữ liệu(HTML) 6 Page - STMicroelectronics |
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6 / 14 page ![]() IAR and EAS electrical thermal approach AN4337 6/14 DocID025012 Rev 1 3 IAR and EAS electrical thermal approach The following section provides step-by-step guidelines on how to achieve the right trade-off between performance and safety margin in terms of IAR and EAS specifications when a MOSFET operates in a flyback converter. We essentially explain how to approach the avalanche phenomenon in order to understand if a MOSFET device can function safely. 3.1 EAS power/thermal evaluations The EAS single pulse avalanche rating in the datasheet is based on the assumption that the device can sustain an avalanche if the starting case temperature is 25 °C and if a specific value of ID is set. The first step is to evaluate the maximum energy that the MOSFET must dissipate during the single avalanche phenomenon. As previously mentioned, in the flyback converter, the voltage spike across the drain-source of the MOSFET grows until the maximum V(BR)DSS is reached. In the absence of an external clamping network, we estimate the amount of energy Elk, due to the leakage inductance, dissipated in the power device. Equation 1 Where Equation 2 Equation 3 For example, consider the 650 V/5.4 A device shown below: Table 1. Electrical rating, absolute maximum rating Symbol Parameter Value Unit VDS Drain source voltage 650 V ID Drain current (continuous) at Tcase= 25⁰C 5.4 A IAR Avalanche current repetitive or not repetitive (pulsed width limited by Tj max) 5.4 A EAS Single pulse avalanche energy (starting Tj=25⁰C, ID=IAR, VDD=50V) 100 mJ t BVD I dt t Vds t Id E ss P t lk ∆ ⋅ ⋅ = = ∫ ∆ 0 2 1 ) ( ) ( N V BVD I L t out ss P lk − ⋅ = ∆ N V BVD BVD L I E out ss ss lk P lk − ⋅ = 2 2 1 |
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