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AN4209 bảng dữ liệu(PDF) 12 Page - STMicroelectronics

tên linh kiện AN4209
Giải thích chi tiết về linh kiện  Design methodology for repetitive voltage suppressors
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AN4209 bảng dữ liệu(HTML) 12 Page - STMicroelectronics

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General design procedure
AN4209
12/19
DocID023949 Rev 2
2.2.1
Step 1: STRVS preselection
In the absence of transient voltages, the STRVS should act as an open circuit and should
have no effect on normal circuit performance (Criteria 1 in Table 2). The preselection begins
with VRM parameters where the leakage current will not exceed 1 µA @ 25 °C when
Voperationmax is applied. Then, all STRVS having a VBR > VPmax can be removed from
consideration to ensure the circuit protection (Criteria 2 Table 2). Note that VPmax represents
the admissible clamping voltage which includes a safety margin generally 15% below the
absolute rating of the end-component to protect.
At this time, several STRVS may cover both criteria 1 and criteria 2. In the first pass using
the highest rated voltage available is recommended. This generally minimizes the standby
consumption and power dissipation.
The smallest package available is primarily chosen to optimize the solution from the thermal
point of view with minimum loop numbers.
2.2.2
Step 2: Clamping voltage assessment
The designer has to check the clamping voltage VCLtyp(IPPmax;125°C) (Criteria 2 Table 2) by
using curves provided in the datasheet. This point has to be verified in the worst case
application and thus the current IPPmax flowing though the device must be identified.
Under steady state operation, we recommend that designers should ensure that Tjpeak
should not exceed 125 °C. This step requires a current measurement because the STRVS
current is generally unknown. If so, it is recommended the designer starts the evaluation
with the highest pre-selected rated voltage and with the biggest package available to avoid
a thermal failure. When the peak current can be predicted or simulated, the clamping
voltage can be directly calculated.
While the VCLtyp(IPPmax;125 °C) > VPmax is true (Criteria 2 Table 2), the rated voltage is
decreased by recursion until the lowest pre-selected STRVS can be identified at a cost of a
higher power dissipation and quiescent current consumption.
2.2.3
Step 3: Dissipated power calculation
Power dissipation assessment is requested to evaluate the maximum and average junction
temperature of the device. Power dissipation is performed with the VCLtyp characteristic
given at 125°C overestimating losses.
By using Equation 6 and/or Equation 10, operating junction temperature of the device can
be computed.
In case of Tjpeak < 125°C, the result corresponds to the smallest package solution
compatible with design rules. Otherwise, the user should return to step 1 or 2 to go over the
available electrical characteristics and package performances of the device. When
dissipated power is too high, a second option is to use STRVS in serial configuration in
order to spread the heat flow between packages.
2.2.4
Step 4: In-situ test
In the last step, we recommend checking the application to ensure that all criteria are
respected with the final selected device.
This step requires a current waveform and lead temperature measurement to calculate the
actual junction temperature and the clamping voltage.



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