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AN4209 bảng dữ liệu(PDF) 6 Page - STMicroelectronics

tên linh kiện AN4209
Giải thích chi tiết về linh kiện  Design methodology for repetitive voltage suppressors
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AN4209 bảng dữ liệu(HTML) 6 Page - STMicroelectronics

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STRVS parameters
AN4209
6/19
DocID023949 Rev 2
RD can be calculated as shown in Equation 3.
Equation 3
VCL0 is shown in Equation 4
Equation 4
This model will be useful to assess the power dissipation of the device.
1.2
Thermal parameters
1.2.1
Steady state parameters
Thermal resistance (Rth(j-Ref))
The thermal resistance represents the package's dissipation capability from the junction
(active die surface) to a specified reference point (case, lead, board, ambient, etc…). Its
value is defined as the temperature difference between two specified points, divided by the
dissipated power under thermal equilibrium conditions.
Equation 5
Where:
The previous equation can be easily reworked to estimate the junction temperature in
steady mode operation as shown in Equation 6.
Equation 6
In STRVSX specifications, the junction-to-lead (Rth(j-l)) and junction-to-ambient (Rth(j-a))
thermal resistances are commonly provided to help designers. These parameters are
determined under standard test conditions with specific board dimensions and layers in
compliance with the JEDEC standard.
Table 1 shows typical thermal resistances for available packages.
1
2
1
1
2
2
2
1
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;
(
)
;
(
)
;
;
(
PP
PP
j
PP
CL
j
PP
CL
J
PP
PP
D
I
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T
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T
I
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R
-
-
=
1
2
1
1
1
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(
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T
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-
=
Rth(j-Ref)
Junction-to-reference thermal resistance expressed in °C/W
PD
Average dissipated power of the die, expressed in W
Tj
Junction temperature of the die expressed in °C
TRef
Temperature of the reference point expressed in °C
D
f
j
f
j
TH
P
T
T
R
Re
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Re
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-
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-
f
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R
T
Re
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Re
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-



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