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AN4253 bảng dữ liệu(PDF) 8 Page - STMicroelectronics |
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AN4253 bảng dữ liệu(HTML) 8 Page - STMicroelectronics |
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8 / 44 page ![]() After reset init AN4253 8/44 DocID024255 Rev 2 2 After reset init Figure 2. Flow of the "After reset init" phase 2.1 Core Register Init (LSM) In Lock Step (LSM) Mode it is mandatory to initialize the core specific purpose register to avoid redundant checker faults under specific circumstances. The reason for the faults comes from the fact that not all core specific purpose registers are initialized after reset and their difference can cause RCCU fault later on. It is not necessary to initialize the core SPRs registers when the device is operating in decoupled mode. 2.1.1 Code sequence 1. Write to selected Core Specific Purpose Registers (SPRs) any value 2.2 Memory Management Unit (MMU) Default reset MMU configuration in each core enables instruction fetch from 4 KB memory block area starting from a reset vector address. 4 KB code area may or may not be sufficient for the startup code, but a main issue of the default MMU configuration is missing access setup for RAM memory and for peripheral modules. They must be explicitly added to the MMU table before any access is executed to them by the startup code. |
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