AN3324

Module software requirements for applicative peripherals

Doc ID 18311 Rev 2

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Figure 9.

ADC self test in CPU mode using one shot sequence

1.

In one shot mode, if test channel is enabled, only one step of selected self testing algorithm is executed at

the end of the chain. The step number and algorithm to be executed is programmed in STCR3 register.

P rogram N C M R 0

S e lec t channel to be

c onv erte d fo r norm a l

convers ion

P rogram

M CR.M O DE = 0

S e le ct one shot m ode

P rogram s a m p ling

duratio n

P rogram

STC R 3 .AL G

Se lec t Se lf T e st

A lgorithm (

P rogram

ST C R 2 .EN = 1

E nable se lf te s ting

channel

P rogram

M C R .NS T A RT = 1

S tart the norm a l

co nve rsio n

P rogram

STC R 3 .M S T E P

S tep N u m ber of S e lf

te s ting A lg . is

executed sim ila r to a

norm a l functional

channel.

D igita l v a lue in

S T DR 1 .T CDA T A –

STD R 1 .VA L ID

se tte d

E O C and E C H bits

are se t in the IS R and

S T _ E O C b it is se t in

ST SR 1 .

ID LE S tate

N o rm al C onv ersions

P rogram

ST C R 1 [IN PS AM P n ]