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HMS87C1202A bảng dữ liệu(PDF) 30 Page - Hynix Semiconductor |
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HMS87C1202A bảng dữ liệu(HTML) 30 Page - Hynix Semiconductor |
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30 / 88 page  HMS87C130XA/120XA/110XA Apr. 2001 ver1.0 27 8.3 Data Memory Figure 8-7 shows the internal Data Memory space availa- ble. Data Memory is divided into two groups, a user RAM (including Stack) and control registers. Figure 8-7 Data Memory Map User Memory The HMS87C1X0XA has 128 × 8 bits for the user memory (RAM). Control Registers The control registers are used by the CPU and Peripheral function blocks for controlling the desired operation of the device. Therefore these registers contain control and status bits for the interrupt system, the timer/ counters, analog to digital converters and I/O ports. The control registers are in address range of 0C0H to 0FFH. Note that unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in gen- eral return random data, and write accesses will have an in- determinate effect. More detailed informations of each register are explained in each peripheral section. Note: Write only registers can not be accessed by bit ma- nipulation instruction. Do not use read-modify-write instruction. Use byte manipulation instruction. Example; To write at CKCTLR LDM CKCTLR,#09H ;Divide ratio ÷16 USER MEMORY CONTROL REGISTERS 0000H 00BFH 00C0H 00FFH PAGE0 (including STACK) 007FH 0080H Address Symbol R/W RESET Value Addressing mode 0C0H 0C1H 0C2H 0C3H 0C4H 0C5H 0C6H 0C7H 0CAH 0CBH 0CCH RA RAIO RB RBIO RC RCIO RD RDIO RAFUNC RBFUNC PUPSEL R/W W R/W W R/W W R/W W W W W Undefined 0000_0000 Undefined 0000_0000 Undefined ----_--00 Undefined ----_0000 0000_0000 0000_0000 ----_0000 byte, bit1 byte2 byte, bit byte byte, bit byte byte, bit byte byte byte byte 0D0H 0D1H 0D1H 0D1H 0D2H 0D3H 0D3H 0D4H 0D4H 0D4H 0D5H TM0 T0 TDR0 CDR0 TM1 TDR1 T1PPR T1 CDR1 T1PDR PWM0HR R/W R W R R/W W W R R R/W W --00_0000 0000_0000 1111_1111 0000_0000 0000_0000 1111_1111 1111_1111 0000_0000 0000_0000 0000_0000 ----_0000 byte, bit byte byte byte byte, bit byte byte byte byte byte, bit byte 0DEH BUR W 1111_1111 byte 0E2H 0E3H 0E4H 0E5H 0E6H 0EAH 0EBH 0ECH 0ECH 0EDH 0EDH 0EFH IENH IENL IRQH IRQL IEDS ADCM ADCR BITR CKCTLR WDTR WDTR PFDR R/W R/W R/W R/W R/W R/W R R W R W R/W 0000_---- 000-_---- 0000_---- 000-_---- ----_0000 --00_0001 Undefined 0000_0000 -001_0111 0000_0000 0111_1111 ----_0100 byte, bit byte, bit byte, bit byte, bit byte, bit byte, bit byte byte byte byte byte byte, bit Table 8-1 Control Registers 1. “byte, bit” means that register can be addressed by not only bit but byte manipulation instruction. 2. “byte” means that register can be addressed by only byte manipulation instruction. On the other hand, do not use any read-modify-write instruction such as bit manipulation for clearing bit. |
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