AT89LP51RC2 datasheet(90/254 Pages) ATMEL

90 / 254 page

3722A–MICRO–10/11

AT89LP51RB2/RC2/IC2 Preliminary

14.2

Capture Mode

In the Capture mode, Timer 2 is a fixed 16-bit timer or counter that counts up from MIN to MAX.

An overflow from MAX to MIN sets bit TF2 in T2CON. If EXEN2 = 1, a 1-to-0 transition at exter-

nal input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and

RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set.

The EXF2 and TF2 bits can generate an interrupt. Capture mode is illustrated in Figure 14-1.

The Timer 2 overflow rate in Capture mode is given by the following equation:

Note:

In Fast Mode, TPS applies only when the T2X2 bit in CKCON0 is set. TPS always

applies in Compatibility Mode, therefore setting T2X2 in Compatibility Mode will double

the timeout period.

Figure 14-1. Timer 2 Diagram: Capture Mode

Table 14-4.

T2MOD – Timer 2 Mode Control Register

T2MOD Address = 0C9H

Reset Value = 0000 0000B

Not Bit Addressable

–––

––

–

T2OE

DCEN

Bit

765

210

Symbol

Function

T2OE

Timer 2 Output Enable

When T2OE = 1 and C/T2 = 0, the T2 pin will toggle after every Timer 2 overflow.

DCEN

Timer 2 Down Count Enable

When Timer 2 operates in Auto-Reload mode and EXEN2 = 1, setting DCEN = 1 will cause Timer 2 to count up or down

depending on the state of T2EX.

Capture Mode:

Time-out Period

65536

SYS

----------------

TPS

()

÷TPS

EXF2

T2EX PIN

T2 PIN

TR2

EXEN2

C/T2 = 0

C/T2 = 1

CAPTURE

OVERFLOW

TRANSITION

DETECTOR

TIMER 2

INTERRUPT

RCAP2H

RCAP2L

TL2

TH2

TF2

CLKSYS

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