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CS5101A bảng dữ liệu(PDF) 29 Page - Cirrus Logic |
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CS5101A bảng dữ liệu(HTML) 29 Page - Cirrus Logic |
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29 / 40 page ![]() 1/2 the throughput frequency without significant errors due to aperture jitter. Power Supply Rejection The power supply rejection performance of the CS5101A and CS5102A is enhanced by the on- chip self-calibration and an "auto-zero" process. Drifts in power supply voltages at frequencies less than the calibration rate have negligible ef- fect on the device’s accuracy. This is because the CS5101A and CS5102A adjust their offset to within a small fraction of an LSB during calibra- tion. Above the calibration frequency the excellent power supply rejection of the internal amplifiers is augmented by an auto-zero process. Any offsets are stored on the capacitor array and are effectively subtracted once conversion is initi- ated. Figure 23 shows power supply rejection of the CS5101A and CS5102A in the bipolar mode with the analog input grounded and a 300 mV p- p ripple applied to each supply. Power supply rejection improves by 6 dB in the unipolar mode. CS5101A/CS5102A Improvements Over Ear- lier CS5101/CS5102 The CS5101A/CS5102A are improved versions of the earlier CS5101/CS5102 devices. Primary improvements are: 1) Improved DNL at high temperature (>70 °C) 2) Improved input slew rate, yielding im- p ro v ed full scale settlin g b etween conversions. 3) Mo difyin g th e p revio us SSH pin to SSH/SDL (Simultaneous Sample Hold/Se- rial Data Latch). The SSH/SDL new function provides a logic signal which frames the 16 data bits in SSC and FRN serial modes. This signal is ideal for easy interface to serial to parallel shift registers (74HC595) and to DSP serial ports. Table 3 summarizes all the improvements. Power Supply Ripple Frequency 90 80 70 60 50 40 30 20 1 kHz 10 kHz 100 kHz 1 MHz Figure 23. Power Supply Rejection CS5101A CS5102A DS45F2 29 |
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