R5F64112DFB datasheet(100/102 Pages) RENESAS

100 / 102 page

A- 7

• Changed expression “Programming and erasure endurance” in Table

5.8

to “Program and erase cycles”; Changed its unit “times” in the table

and Note 1 to “Cycles”

• Changed order of descriptions of “trec(STOP)” and “trec(WAIT)” in Table

5.13 and Figure 5.4

• Changed expressions “

CS0” and “A23 to A0, BC0 to BC3” in Figure

5.5

to “Chip select” and “Address”, respectively

78, 90

• Corrected “INTi” in title of Tables 5.32 and 5.55 to “

INTi”

81, 93

• Added measurement condition to Tables 5.37 and 5.60

Appendix 1. Package Dimensions

98-99

• Added a seating plane to the drawing of package dimension

1.30

Mar 3, 2014

—

Fifth edition released

—

• Deleted description for the 80-pin package

Chapter 1. Overview

—

• Modified wording and enhanced description in this chapter

• Modified expression “I2C” in line 9 of 1.1 to “I2C-bus interface”

2, 4

• Modified expressions “calculation transfer” and “chained transfer” in

Tables 1.1 and 1.3

to “calculation result transfer” and “chain transfer”,

respectively

• Deleted N version from the Operating Temperature row in Table 1.4

• Deleted products on planning phase from Table 1.5

20, 23

• Modified expression “I2C bus” in Tables 1.13 and 1.16 to “I2C-bus”

Chapter 2. CPU

—

• Modified wording and enhanced description in this chapter

Chapter 5. Electrical Characteristics

—

• Modified wording and enhanced description in this chapter

65, 77

• Deleted TXD4, STXD4, and

RTS4 from Tables 5.16 and 5.39

66, 78

• Modified description “Drive power” in Tables 5.17 and 5.40 to “Drive

strength”

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Revision History

R32C/111 Group Datasheet

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Date

Description

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