R5F64112DFB datasheet(94/102 Pages) RENESAS

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Revision History

R32C/111 Group Datasheet

Rev.

Date

Description

Page

Summary

0.03

Oct 17, 2007

—

Initial release

0.30

Aug 19, 2008

—

Second edition released

—

The manual in general

• Maximum operating frequency changed from 48 MHz to 50 MHz

• Specification of on-chip oscillator disclosed

• Microprocessor mode becomes optional

• “memory-expanded mode” changed to “memory expansion mode”

Chapter 1

• “(MCUs)” added to line 1 of 1.1

• Applications in 1.1.1 revised and modified

• “Attention Users” below 1.1.1 modified to “Notes to users”; “The

specification” in this box changed to “Specifications”

• “instructions” in “CPU” of Table 1.1 deleted

• Minimum instruction execution time in “CPU” of Table 1.1 changed

• Microprocessor mode in CPU” of Table 1.1 changed to optional

• “TBD” for “Voltage Detection” in Table 1.1 deleted

• “3 circuits” for “Clock” in Table 1.1 changed to “4 circuits”

• “Total interrupt vectors” in Table 1.1 changed to “Interrupt vectors”

• Trigger sources” for DMA in Table 1.1 modified to “Request sources”;

Request sources for “DMA” defined as 51

• Scribal error: “peripheral interrupt sources” for “DMACII” in Table 1.1

corrected to “peripheral interrupt source”

• Unit names in Table 1.2 sorted in chapter order

• Description for “A/D Converter” in Table 1.2 changed

• “Operating frequency” in Table 1.2 changed from “48 MHz” to “50

MHz”

• “version N” and “version D” added to “Operating Temperature” in Table

1.2

; “optional” deleted

• Values for “Current Consumption” in Table 1.2 added

• “version N” and “version D” added to Table 1.3

• All “version N”s in Table 1.3 become on planning phase

6• Figure 1.2 modified

• Note 2 for Figure 1.3 modified

• Scribal error: “CLK5/” (pin No. 21) in Table 1.4 corrected to “CLK5”

• Description for “Connecting pins for decoupling capacitor”, “CNVSS”,

and “Debug port” in Table 1.7 modified

• Some descriptions for “

WR0/WR1/WR/BC0/BC1/RD” of “Bus control

pins” in Table 1.8 modified

13, 14

• Functional category items in Tables 1.9 and 1.10 sorted in chapter

order; Descriptions modified

Chapter 2

—

• Descriptions for this chapter modified; Expression “DMAC-related

registers”s modified to “DMAC-associated registers”s

• “Data register” and “Address register” in Figure 2.1 pluralized;

Explanation in Notes 1 and 2 for this figure revised

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