R5F64112DFB datasheet(99/102 Pages) RENESAS

99 / 102 page

A- 6

2, 4, 6

• Modified the following expressions in Tables 1.1, 1.3, and 1.5: “Main

clock oscillator stop/re-oscillation detection” to “Main clock oscillator

stop/restart detection”, and “inputs/outputs” to “I/O ports”

• Deleted Note 1 from Table 1.2

4, 6

• Deleted memory expansion mode and microprocessor mode from the

operating mode of the CPU in Tables 1.3 and 1.5

5, 7

• Deleted Note 2 from Tables 1.4 and 1.6

• Corrected package code in Table 1.6 to “PLQP0064KB-A”

• Completed “under development” phase of R5F6411EDFN in Table 1.7

10-12

• Deleted Note 1 from Figures 1.2 to 1.4

• Corrected a typo “R5_3” for pin number 41 in Figure 1.5 to “P5_3”

13, 18,

• Changed order of signals in Figures 1.5, 1.7, and 1.8

15, 19,

• Changed order of timer pins “TB5IN/TA0IN” in Tables 1.8, 1.11, and

1.13

to “TA0IN/TB5IN”

• Modified expression “fC” in Table 1.15 to “low speed clocks”

Chapter 2. CPU

—

• Modified wording and enhanced description in this chapter

• Corrected a typo “R3R0” in line 3 of 2.1.1 to “R3R1”

Chapter 3. Memory

—

• Modified wording and enhanced description in this chapter

Chapter 4. SFRs

—

• Modified wording and enhanced description in this chapter

41, 42,

• Changed hexadecimal format of reset values for registers G1BCR0,

G2BCR0, and G0BCR0 in Tables 4.6, 4.7, and 4.9 to binary

41, 44

• Changed register name “Group i Timer Measurement Prescaler

Prescaler Register”

• Modified expression “IE Bus” in Table 4.8 to “IEBus”

• Modified expression “XY Control Register” in Table 4.11 to “X-Y

Control Register”

• Changed register name “UART2 Transmission/Receive Mode

Table 4.13

to “UART2 Transmit/Receive Mode Register” and

“Increment/Decrement Select Register”, respectively; Changed

hexadecimal format of reset values for registers TABSR, ONSF, and

TRGSR to binary

• Changed reset value “X00X X000b” for AD0CON2 register in Table

4.15

to “XX0X X000b”

• Changed register name “External Interrupt Source Select Register i” in

Table 4.24

to “External Interrupt Request Source Select Register i”

Chapter 5. Electrical Characteristics

—

• Modified wording and enhanced description in this chapter

• Changed expression “clock period” to “clock cycle time”

• Changed format for ports P0 and P1 in Table 5.2

Revision History

R32C/111 Group Datasheet

Rev.

Date

Description

Page

Summary

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