AS8506 datasheet(39/89 Pages) AMSCO

39 / 89 page

ams Datasheet, Confidential:2013-Sep [1-00]

AS8506 – 39

Devic e I n te r f ac e

The SPI protocol frame is divided into two fields.

• The header field

•The data field

The header field is 1 byte long; containing a read/write

command bit, 1 reserved bit, and 6 address bits. The SPI frame

format is shown in Figure 31. In the data phase MSB is sent first

and LSB is sent last.

Figure 31:

SPI Frame Format

SPI Write Operation

The SPI write operation begins with clock polarity selection at

negative edge of CS (see Figure 30). Once the clock polarity is

selected, the SPI write command is given by providing ‘0’ in R/W

bit of the header field in first sampling edge at SDI pin. The next

bit in header field is reserved and set to ‘0’. The 6 bits address

of register to be written is provided at SDI pin in next six

consecutive sampling edges of SCLK. The data to be written is

followed by last bit of header field. With each sampling edge a

bit is sampled starting from MSB to LSB. During complete SPI

write operation the SCSN has to be ‘Low’. The SPI write

operation ends with positive edge of SCSN. The waveform for

SPI write operation with single data byte is shown in Figure 32

and Figure 33.

R/W

Header Field

Data Field

1 byte

Integer Multiple of Bytes

DATA

Reserved

Bit

6 bits

Address

0 – WRITE

1 – READ

0A5

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