IO96NDB2V1 datasheet(103/242 Pages) MICROSEMI

103 / 242 page

ProASIC3L Low Power Flash FPGAs

Revision 13

2-87

3.3 V GTL+

Gunning Transceiver Logic Plus is a high-speed bus standard (JESD8-3). It provides a differential

amplifier input buffer and an open-drain output buffer. The VCCI pin should be connected to 3.3 V

Timing Characteristics

Table 2-142 • Minimum and Maximum DC Input and Output Levels

3.3 V GTL+

VIL

VIH

VOL

VOH IOL IOH

IOSL

IOSH

IIL IIH

Drive

Strength

Min.

Max.

Min.

Max.

Min.

VmA mA

Max.

mA1

Max.

mA1

µA2 µA2

35 mA

–0.3

VREF – 0.1 VREF + 0.1

3.6

0.6

–

35 35

268

181

10 10

Notes:

1. Currents are measured at 100°C junction temperature and maximum voltage.

2. Currents are measured at 85°C junction temperature.

Figure 2-15 • AC Loading

Table 2-143 • AC Waveforms, Measuring Points, and Capacitive Loads

Input Low (V)

Input High (V)

Measuring

Point* (V)

VREF (typ.) (V)

VTT (typ.) (V)

CLOAD (pF)

VREF – 0.1

VREF + 0.1

1.0

1.5

Note: *Measuring point = Vtrip. See Table 2-16 on page 2-12 for a complete table of trip points.

Test Point

10 pF

GTL+

VTT

Table 2-144 • 3.3 V GTL+ – Applies to 1.5 V DC Core Voltage

Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V,

Worst-Case VCCI = 3.0 V VREF = 1.0 V

Applicable to Pro I/O Banks

Speed

Grade

tDOUT

tDP

tDIN

tPY

tEOUT

tZL

tZH

tLZ

tHZ

tZLS

tZHS

Units

Std.

0.59

1.85

0.04

2.12

0.38

1.88

1.85

3.90

3.86

–1

0.50

1.57

0.03

1.80

0.33

1.60

1.57

3.31

3.29

Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.

Table 2-145 • 3.3 V GTL+ – Applies to 1.2 V DC Core Voltage

Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V,

Worst-Case VCCI = 3.0 V VREF = 1.0 V

Applicable to Pro I/O Banks

Speed

Grade

tDOUT

tDP

tDIN

tPY

tEOUT

tZL

tZH

tLZ

tHZ

tZLS

tZHS

Units

Std.

0.77

1.85

0.05

2.12

0.50

1.88

1.85

3.90

3.86

–1

0.66

1.57

0.04

1.80

0.43

1.60

1.57

3.31

3.29

Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.

IO96NDB2V1 bảng dữ liệu(PDF) 103 Page - Microsemi Corporation

IO96NDB2V1 bảng dữ liệu(HTML) 103 Page - Microsemi Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL