IO96NDB2V1 datasheet(30/242 Pages) MICROSEMI

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ProASIC3L DC and Switching Characteristics

2-14

Revision 13

Table 2-19 • Different Components Contributing to Dynamic Power Consumption in ProASIC3L Devices at

1.5 V VCC

Parameter

Definition

Device Specific Dynamic Power (µW/MHz)

A3PE3000L A3P1000L A3P600L A3P250L

PAC1

Clock contribution of a Global Rib

19.7

14.50

12.80

11.00

PAC2

Clock contribution of a Global Spine

4.16

2.48

1.85

1.58

PAC3

Clock contribution of a VersaTile row

0.88

0.81

PAC4

Clock contribution of a VersaTile used as a sequential

module

0.12

PAC5

First contribution of a VersaTile used as a sequential

module

0.07

PAC6

Second contribution of a VersaTile used as a sequential

module

0.29

PAC7

Contribution of a VersaTile used as a combinatorial

Module

0.29

PAC8

Average contribution of a routing net

0.70

PAC9

Contribution of an I/O input pin (standard-dependent)

See Table 2-12 on page 2-9. through

Table 2-14 on page 2-10.

PAC10

Contribution of an I/O output pin (standard-dependent)

See Table 2-15 on page 2-11 through

Table 2-17 on page 2-12.

PAC11

Average contribution of a RAM block during a read

operation

25.00

PAC12

Average contribution of a RAM block during a write

operation

30.00

PAC13

Dynamic contribution for PLL

2.60

Note: *For a different output load, drive strength, or slew rate, Microsemi recommends using the Microsemi power

spreadsheet calculator or SmartPower tool in Libero SoC.

Table 2-20 • Different Components Contributing to the Static Power Consumption in ProASIC3L Devices

Parameter

Definition

Device Specific Dynamic Power (µW)

A3PE3000L A3P1000L A3P600L A3P250L

PDC1

Array static power in Active mode

See Table 2-11 on page 2-8.

PDC2

Array static power in Static (Idle) mode

See Table 2-9 on page 2-8.

PDC3

Array static power in Flash*Freeze mode

See Table 2-8 on page 2-7.

PDC4

Static PLL contribution at 1.2 V core (operating mode

only)

1.42 mW

Static PLL contribution at 1.5 V core (operating mode

only)

2.55 mW

PDC5

Bank quiescent power (VCCI-dependent)

See Table 2-8 on page 2-7, Table 2-9 on

page 2-8, Table 2-11 on page 2-8.

PDC6

I/O input pin static power (standard-dependent)

See Table 2-12 on page 2-9 through

Table 2-14 on page 2-10.

PDC7

I/O output pin static power (standard-dependent)

See Table 2-15 on page 2-11 through

Table 2-17 on page 2-12.

Note: *For a different output load, drive strength, or slew rate, Microsemi recommends using the Microsemi power

spreadsheet calculator or SmartPower tool in Libero SoC.

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