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W25X05CLZPIG bảng dữ liệu(PDF) 19 Page - Winbond

tên linh kiện W25X05CLZPIG
Giải thích chi tiết về linh kiện  2.5 / 3 / 3.3 V 512K / 1M / 2M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI
PDF  51 Pages
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W25X05CL/10CL/20CL
Publication Release Date: March 23, 2012
- 19 -
Revision B
8.2.9 Fast Read (0Bh)
The Fast Read instruction is similar to the Read Data instruction except that it can operate at the
highest possible frequency of FR (see AC Electrical Characteristics). This is accomplished by adding
eight “dummy” clocks after the 24-bit address as shown in figure 10. The dummy clocks allow the
devices internal circuits additional time for setting up the initial address. During the dummy clocks the
data value on the DIO pin is a “don’t care”.
Figure 10. Fast Read Instruction Sequence Diagram
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (0Bh)
High Impedance
8
9
10
28
29
30
31
24-Bit Address
23
22
21
3
2
1
0
Data Out 1
*
/CS
CLK
DI
(IO
0)
DO
(IO
1)
32
33
34
35
36
37
38
39
Dummy Clocks
High Impedance
40
41
42
44
45
46
47
48
49
50
51
52
53
54
55
7
6
5
4
3
2
1
0
7
Data Out 2
*
7
6
5
4
3
2
1
0
*
43
31
0
= MSB
*



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