| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
MPC8358ECVRADDDA bảng dữ liệu(PDF) 98 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC8358ECVRADDDA bảng dữ liệu(HTML) 98 Page - Freescale Semiconductor, Inc |
|
98 / 102 page ![]() MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5 98 Freescale Semiconductor Configuration Pin Muxing Figure 57. Driver Impedance Measurement The value of this resistance and the strength of the driver’s current source can be found by making two measurements. First, the output voltage is measured while driving logic 1 without an external differential termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured while driving logic 1 with an external precision differential termination resistor of value Rterm. The measured voltage is V2 = 1/(1/R1 +1/R2)) × Isource. Solving for the output impedance gives Rsource = Rterm × (V1/V2 – 1). The drive current is then Isource =V1/Rsource. This table summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD, nominal OVDD, 105 ° C. 23.6 Configuration Pin Muxing The device provides the user with power-on configuration options that can be set through the use of external pull-up or pull-down resistors of 4.7 k Ωon certain output pins (see customer visible configuration pins). These pins are generally used as output only pins in normal operation. While HRESET is asserted however, these pins are treated as inputs. The value presented on these pins while HRESET is asserted, is latched when HRESET deasserts, at which time the input receiver is disabled and the I/O circuit takes on its normal function. Careful board layout with stubless connections to these pull-up/pull-down resistors coupled with the large value of the pull-up/pull-down resistor should minimize the disruption of signal quality or speed for output pins thus configured. Table 79. Impedance Characteristics Impedance Local Bus, Ethernet, DUART, Control, Configuration, Power Management PCI DDR DRAM Symbol Unit RN 42 Target 25 Target 20 Target Z0 W RP 42 Target 25 Target 20 Target Z0 W Differential NA NA NA ZDIFF W Note: Nominal supply voltages. See Table 1, TJ = 105° C. OVDD OGND RP RN Pad Data SW1 SW2 |
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |