M68040 datasheet(71/442 Pages) FREESCALE

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M68040 USER'S MANUAL

MOTOROLA

Table 3-1. Updating U-Bit and M-Bit for Page Descriptors

Previous Status

Access

Page Descriptor

New Status

U-Bit

M-Bit

WP Bit

Type

Update Operation

U-Bit

M-Bit

Locked RMW Access to Set U

Read

None

Write to Set U and M

Locked RMW Access to Set U

Write to Set M

Write

None

Locked RMW Access to Set U

None

NOTE: WP indicates the accumulated write-protect status.

An alternate address space access is a special case that is immediately used as a

physical address without translation. Because the M68040 implements a merged

instruction and data space, the integer unit translates MOVES accesses to instruction

address spaces (SFC/DFC = $6 or $2) into data references (SFC/DFC = $5 or $1). The

data memory unit handles these translated accesses as normal data accesses. If the

access fails due to an ATC fault or a physical bus error, the resulting access error stack

frame contains the converted function code in the TM field for the faulted access.

Invalidation of the instruction cache line containing the referenced location to maintain

cache coherency must precede MOVES accesses that write the instruction address

space. The SFC and DFC values and results are listed in Table 3-2.

Table 3-2. SFC and DFC Values

Results

SFC/DFC Value

000

001

010

001

011

100

101

110

101

111

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