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DP8110 bảng dữ liệu(PDF) 6 Page - Power-One

tên linh kiện DP8110
Giải thích chi tiết về linh kiện  8V to 14V Input, 0.7V to 5.5V Output
PDF  34 Pages
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DP8110 bảng dữ liệu(HTML) 6 Page - Power-One

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DP8110 10A DC-DC Intelligent dPOL Data Sheet
8V to 14V Input •••• 0.7V to 5.5V Output
BCD.00262 Rev. 1.0, 12 FEB 2013
www.power-one.com
Page 6 of 34
4.4
Feature Specifications
Parameter
Conditions/Description
Min
Nom
Max
Units
Current Share
Type
Active, Single Line
Maximum Number of Modules
Connected in Parallel
IOUT ≥ 0
4
Current Share Accuracy
IOUT ≥ 20% IOUT NOM
±20
%IOUT
Interleave
Interleave (Phase Shift)
Default
Programmable in 22.5° steps
0
0
337.5
Degree
degree
Sequencing
7
Turn ON Delay
Default
Programmable in 1ms steps
0
0
255
ms
ms
Turn OFF Delay
Default
Programmable in 1ms steps
0
0
63
ms
ms
Tracking
Turn ON Slew Rate
Default
Programmable in 8 steps
0.05
0.05
2.0
8
V/ms
V/ms
Turn OFF Slew Rate
Default
Programmable in 8 steps
-0.05
-0.05
-2.0
8
V/ms
V/ms
Optimal Voltage Positioning
Load Regulation
Default
Programmable in 7 steps
0
0
2.45
mV/A
mV/A
Feedback Loop Compensation
Proportional (Kr)
Programmable
0.01
2
Integral (Ti)
Programmable
1
100
µs
Differential (Td)
Programmable
1
100
µs
Differential Roll-Off (Tv)
Programmable
1
100
µs
Monitoring
Voltage Monitoring Accuracy
12 Bit Resolution over 0.5…5.5V
-0.5
0.5
%
Current Monitoring Accuracy
20%×IOUT NOM < IOUT < IOUT NOM
-20
+20
%IOUT
Temperature Monitoring Accuracy
Junction temperature of dPOL
controller
-5
+5
°
C
Remote Voltage Sense (+VS and –VS pins)
9
Voltage Drop Compensation
Between +VS and VOUT
300
mV
Voltage Drop Compensation
Between -VS and PGND
100
mV
7
Timing based on SD clock and subject to tolerances of SD.
8
Achieving fast slew rates under specific line and load conditions may require feedback loop adjustment. See Rising and Falling Slew Rates..
9
For remote sense, it is recommended to place a 0.01-0.1µF ceramic capacitor between +VS and –VS pins as close to the dPOL converter
as possible.



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