DP8110 10A DC-DC Intelligent dPOL Data Sheet

BCD.00262 Rev. 1.0, 12 FEB 2013

www.power-one.com

Page 31 of 34

10. Typical Application

Shown in Figure 53 is a block diagram of a multiple dPOL power system. The key interconnections needed

between the DPM and the dPOLs are Intermediate Voltage Bus (IBV), SD, OK (A - D), and, between the first two

dPOLs which share a bus load, their CS connections. Each dPOL has its own output bulk filter capacitors. This

illustrates how simple a dPOL based system is to implement in hardware. SD provides synchronization of all

dPOLs as well as communication. PG, not shown, is optional, though this is usually used with auxiliary power

supplies that are not digitally controlled.

Figure 53. Multi-dPOL Power System Diagram

Shown in Figure 54 is a more detailed schematic of a typical application using a DM7300 series Digital Power

Manager (DPM) and at least one DP7007 point-of-load converter (dPOL). Additional dPWER

be connected (Note SD and OK dashed lines "TO OTHER dPOLS"). As noted earlier, OK connections are

determined by which group a given dPOL is assigned to in the user's application.

In this case the DP7007 is connected to OK-A. Shown connected to the dP7007 OK pin is an optional low value

resistor helpful in some cases for fault isolation.

The type, value, and the number of output capacitors shown in the schematic are required to meet the

specifications published in the data sheet.

However, all dPWER

configurations of output capacitors. The supervisory reset circuit in the above diagram, U2, is recommended for

systems where the 3.3V supply to the DPM does not turn on faster than 0.5 V/ms.

The DPM does require some passive components which are located close to that part but not shown in the

diagram above.

Note: The DP8110 is footprint compatible with the ZY8110—No change in PCB is needed to upgrade to dPWER

®

parts., However, configuration data must be altered through the Power-One I2C GUI and programmed into the

DPM. When upgrading to dPWER

upgraded

.