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M68HC08 bảng dữ liệu(PDF) 80 Page - Freescale Semiconductor, Inc

tên linh kiện M68HC08
Giải thích chi tiết về linh kiện  MC68HC908JB16 Technical Data
PDF  332 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
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M68HC08 bảng dữ liệu(HTML) 80 Page - Freescale Semiconductor, Inc

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Central Processor Unit (CPU)
Technical Data
MC68HC908JB16 — Rev. 1.1
80
Central Processor Unit (CPU)
Freescale Semiconductor
6.4.5 Condition Code Register
The 8-bit condition code register contains the interrupt mask and five
flags that indicate the results of the instruction just executed. Bits 6 and
5 are set permanently to logic 1. The following paragraphs describe the
functions of the condition code register.
V — Overflow Flag
The CPU sets the overflow flag when a two's complement overflow
occurs. The signed branch instructions BGT, BGE, BLE, and BLT use
the overflow flag.
1 = Overflow
0 = No overflow
H — Half-Carry Flag
The CPU sets the half-carry flag when a carry occurs between
accumulator bits 3 and 4 during an add-without-carry (ADD) or add-
with-carry (ADC) operation. The half-carry flag is required for binary-
coded decimal (BCD) arithmetic operations. The DAA instruction
uses the states of the H and C flags to determine the appropriate
correction factor.
1 = Carry between bits 3 and 4
0 = No carry between bits 3 and 4
Bit 7
654321
Bit 0
Read:
V1
1
H
I
N
Z
C
Write:
Reset:
X
1
1
X
1
XXX
X = Indeterminate
Figure 6-6. Condition Code Register (CCR)



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