M68HC08 datasheet(36/332 Pages) FREESCALE

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General Description

Technical Data

MC68HC908JB16 — Rev. 1.1

General Description

Freescale Semiconductor

1.6.6 CGM Power Supply Pins (VDDA, VSSA0, VSSA1)

VDDA is the power supply pin, VSSA0 and VSSA1 are the ground pins for

the analog portion of the clock generator modules (CGMs). Connect

VDDA to the same voltage potential as VDD. Connect VSSA0 and VSSA1

pins to the same voltage potential as VSS. Decoupling of these pins

should be as per the digital supply.

1.6.7 CGM Voltage Regulator Out (VREGA0)

VREGA0 is the 3.3V output of the second on-chip voltage regulator.

VREGA0 is used for CGM1 and CGM2 operation. Decoupling of this pin

should be as per the digital VREG.

1.6.8 CGM Voltage Regulator In (VREGA1)

VREGA1 is the 3.3V input pin for CGM2. Connect VREGA1 directly to

VREGA0. Decoupling of VREGA1 pin should be as per VREGA0.

1.6.9 External Filter Capacitor Pins (CGMXFC1, CGMXFC2)

CGMXFC1 and CGMXFC2 are external capacitor connections for the

respective CGMs.

1.6.10 CGM Clock Output Pins (CGMOUT1, CGMOUT2)

CGMOUT1 and CGMOUT2 are buffered VCO outputs of the respective

CGMs.

1.6.11 Port A Input/Output (I/O) Pins (PTA7/KBA7–PTA0/KBA0)

PTA7/KBA7–PTA0/KBA0 are general-purpose bidirectional I/O port

pins. (See Section 14. Input/Output (I/O) Ports.) Each pin contains a

software configurable pullup device to VDD when the pin is configured as

an input. (See 14.7 Port Options.) Each pin can also be programmed

as an external keyboard interrupt pin. (See Section 16. Keyboard

Interrupt Module (KBI).)

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