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M68HC08 bảng dữ liệu(PDF) 61 Page - Freescale Semiconductor, Inc |
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M68HC08 bảng dữ liệu(HTML) 61 Page - Freescale Semiconductor, Inc |
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61 / 332 page ![]() FLASH Memory MC68HC908JB16 — Rev. 1.1 Technical Data Freescale Semiconductor FLASH Memory 61 4.4 FLASH Control Register The FLASH control register (FLCR) controls FLASH program and erase operation. HVEN — High Voltage Enable Bit This read/write bit enables high voltage from the charge pump to the memory for either program or erase operation. It can only be set if either PGM=1 or ERASE=1 and the sequence for erase or program/verify is followed. 1 = High voltage enabled to array and charge pump on 0 = High voltage disabled to array and charge pump off MASS — Mass Erase Control Bit This read/write bit configures the memory for mass erase operation or block erase operation when the ERASE bit is set. 1 = Mass Erase operation selected 0 = Block Erase operation selected ERASE — Erase Control Bit This read/write bit configures the memory for erase operation. This bit and the PGM bit should not be set to 1 at the same time. 1 = Erase operation selected 0 = Erase operation not selected PGM — Program Control Bit This read/write bit configures the memory for program operation. This bit and the ERASE bit should not be set to 1 at the same time. 1 = Program operation selected 0 = Program operation not selected Address: $FE08 Bit 7 654321 Bit 0 Read: 0000 HVEN MASS ERASE PGM Write: Reset: 00000000 = Unimplemented Figure 4-2. FLASH Control Register (FLCR) |
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