MPC875CVR133 datasheet(51/84 Pages) FREESCALE

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MPC875/MPC870 PowerQUICC™ Hardware Specifications, Rev. 4

Freescale Semiconductor

CPM Electrical Characteristics

Figure 47. CPM General-Purpose Timers Timing Diagram

13.5

Serial Interface AC Electrical Specifications

Table 21 provides the serial interface (SI) timings as shown in Figure 48 through Figure 52.

Table 21. SI Timing

Num

Characteristic

All Frequencies

Unit

Min

Max

L1RCLKB, L1TCLKB frequency (DSC = 0)1, 2

—

SYNCCLK/2.5

MHz

L1RCLKB, L1TCLKB width low (DSC = 0)2

P + 10

—

71a

L1RCLKB, L1TCLKB width high (DSC = 0)3

P + 10

—

L1TXDB, L1ST1 and L1ST2, L1RQ, L1CLKO rise/fall time

—

15.00

L1RSYNCB, L1TSYNCB valid to L1CLKB edge (SYNC setup time)

20.00

—

L1CLKB edge to L1RSYNCB, L1TSYNCB, invalid (SYNC hold time)

35.00

—

L1RSYNCB, L1TSYNCB rise/fall time

—

15.00

L1RXDB valid to L1CLKB edge (L1RXDB setup time)

17.00

—

L1CLKB edge to L1RXDB invalid (L1RXDB hold time)

13.00

—

L1CLKB edge to L1ST1 and L1ST2 valid4

10.00

45.00

78A

L1SYNCB valid to L1ST1 and L1ST2 valid

10.00

45.00

L1CLKB edge to L1ST1 and L1ST2 invalid

10.00

45.00

L1CLKB edge to L1TXDB valid

10.00

55.00

80A

L1TSYNCB valid to L1TXDB valid4

10.00

55.00

L1CLKB edge to L1TXDB high impedance

0.00

42.00

L1RCLKB, L1TCLKB frequency (DSC = 1)

—

16.00 or

SYNCCLK/2

MHz

L1RCLKB, L1TCLKB width low (DSC = 1)

P + 10

—

CLKO

TIN/TGATE

(Input)

TOUT

(Output)

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