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dsPIC33FJ64GS406 bảng dữ liệu(PDF) 257 Page - Microchip Technology |
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dsPIC33FJ64GS406 bảng dữ liệu(HTML) 257 Page - Microchip Technology |
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257 / 456 page ![]() 2009-2012 Microchip Technology Inc. DS70591E-page 257 dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 17.0 QUADRATURE ENCODER INTERFACE (QEI) MODULE This chapter describes the Quadrature Encoder Inter- face (QEI) module and associated operational modes. The QEI module provides the interface to incremental encoders for obtaining mechanical position data. The operational features of the QEI include: • Three Input Channels for Two Phase Signals and Index Pulse • 16-Bit Up/Down Position Counter • Count Direction Status • Position Measurement (x2 and x4) mode • Programmable Digital Noise Filters on Inputs • Alternate 16-Bit Timer/Counter mode • Quadrature Encoder Interface Interrupts These operating modes are determined by setting the appropriate bits, QEIM<2:0> in (QEIxCON<10:8>). Figure 17-1 depicts the Quadrature Encoder Interface block diagram. FIGURE 17-1: QUADRATURE ENCODER INTERFACE x BLOCK DIAGRAM (x = 1 OR 2) Note 1: This data sheet summarizes the features of the dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 families of devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to Section 15. “Quadrature Encoder Interface (QEI)” (DS70208) in the “dsPIC33F/PIC24H Family Reference Manual”, which is available from the Microchip web site (www.microchip.com). 2: Some registers and associated bits described in this section may not be available on all devices. Refer to Section 4.0 “Memory Organization” in this data sheet for device-specific register and bit information. Note: An ‘x’ used in the names of pins, control/ status bits and registers denotes a particular QEI module number (x = 1 or 2). Comparator/ QEAx(1) INDXx(1) 1 Up/Down Existing Pin Logic UPDNx 3 QEBx(1) QEIM<2:0> Mode Select 3 PCDOUT QExIF Event Flag Reset Equal 2 TCY 1 0 TQCS TQCKPS<1:0> 2 Q Q D CK TQGATE QEIM<2:0> 1 0 Sleep Input 0 1 UPDN_SRC QEIxCON<11> Zero-Detect 1, 8, 64, 256 Prescaler Quadrature Encoder Interface Logic Programmable Digital Filter Programmable Digital Filter Programmable Digital Filter Note 1: The QEI1 module can be connected to the QEA1/QEB1/INDX1 or AQEA1/AQEB1/AINDX1 pins, which are controlled by clearing or setting the ALTQIO bit in the FPOR Configuration register. See Section 24.0 “Special Features” for more information. Synchronize Detect 16-Bit Up/Down Counter (POSxCNT) Max Count Register (MAXxCNT) |
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