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dsPIC33FJ64GS406 bảng dữ liệu(PDF) 95 Page - Microchip Technology

tên linh kiện dsPIC33FJ64GS406
Giải thích chi tiết về linh kiện  16-Bit Digital Signal Controllers with High-Speed PWM, ADC and Comparators
PDF  456 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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dsPIC33FJ64GS406 bảng dữ liệu(HTML) 95 Page - Microchip Technology

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TABLE 4-55:
PORTG REGISTER MAP FOR dsPIC33FJ32GS608 AND dsPIC33FJ64GS608 DEVICES
TABLE 4-56:
PORTG REGISTER MAP FOR dsPIC33FJ32GS406/606 AND dsPIC33FJ64GS406/606 DEVICES
TABLE 4-57:
SYSTEM CONTROL REGISTER MAP
File
Name
SFR
Addr.
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
TRISG
02F0
—
—
—
—
—
—
TRISG9
TRISG8
TRISG7
TRISG6
—
—
TRISG3
TRISG2
TRISG1
TRISG0
03CF
PORTG
02F2
—
—
—
—
—
—
RG9
RG8
RG7
RG6
—
—
RG3
RG2
RG1
RG0
xxxx
LATG
02F4
—
—
—
—
—
—
LATG9
LATG8
LATG7
LATG6
—
—
LATG3
LATG2
LATG1
LATG0
0000
ODCG
02F6
—
—
—
—
—
—
ODCG9
ODCG8
ODCG7
ODCG6
—
—
ODCG3
ODCG2
ODCG1
ODCG0
0000
Legend:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
File
Name
SFR
Addr.
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
TRISG
02F0
—
—
—
—
—
—
TRISG9
TRISG8
TRISG7
TRISG6
—
—
TRISG3
TRISG2
—
—
03CC
PORTG
02F2
—
—
—
—
—
—
RG9
RG8
RG7
RG6
—
—RG3
RG2
—
—
xxxx
LATG
02F4
—
—
—
—
—
—
LATG9
LATG8
LATG7
LATG6
—
—LATG3
LATG2
—
—
0000
ODCG
02F6
—
—
—
—
—
—
ODCG9
ODCG8
ODCG7
ODCG6
—
—
ODCG3
ODCG2
—
—
0000
Legend:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
File Name
SFR
Addr.
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
RCON
0740
TRAPR
IOPUWR
—
—
—
—
—
VREGS
EXTR
SWR
SWDTEN
WDTO
SLEEP
IDLE
BOR
POR
xxxx(1)
OSCCON
0742
—
COSC<2:0>
—
NOSC<2:0>
CLKLOCK
—LOCK
—CF
—
—OSWEN
0300(2)
CLKDIV
0744
ROI
DOZE<2:0>
DOZEN
FRCDIV<2:0>
PLLPOST<1:0>
—
PLLPRE<4:0>
0040
PLLFBD
0746
—
—
—
—
—
—
—
PLLDIV<8:0>
0030
OSCTUN
0748
—
—
—
—
—
—
—
—
—
—
TUN<5:0>
0000
REFOCON
074E
ROON
—
ROSSLP
ROSEL
RODIV<3:0>
—
—
—
—
—
—
—
—
0000
ACLKCON
0750
ENAPLL
APLLCK
SELACLK
—
—
APSTSCLR<2:0>
ASRCSEL
FRCSEL
—
—
—
—
—
—
2300
Legend:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note
1:
The RCON register Reset values are dependent on the type of Reset.
2:
The OSCCON register Reset values are dependent on the FOSCx Configuration bits and on the type of Reset.



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