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ADAU1977WBCPZ-R7 bảng dữ liệu(PDF) 23 Page - Analog Devices |
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ADAU1977WBCPZ-R7 bảng dữ liệu(HTML) 23 Page - Analog Devices |
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23 / 64 page ![]() Data Sheet ADAU1977 Rev. A | Page 23 of 64 In the event of a fault on an input pin, the FAULT pin goes low or high depending on the setting of the IRQ_POL bit in Register 0x15 to send an interrupt request to the system microcontroller. The system microcontroller responds to the interrupt request by communicating with the ADAU1977 via the I2C. The following is the typical interrupt service routine: 1. An interrupt request is generated from the ADAU1977 to the system microcontroller. 2. Read Register 0x11 through Register 0x14. (It is recom- mended to read all four diagnostics status registers— Register 0x11 through Register 0x14—in one sequence. Reading the registers as a single read may not report the status accurately.) 3. Write Register 0x15, Bit 6 (the IRQ_RESET bit). 4. Wait for the fault timeout period to expire. 5. If the fault was temporary and did not persist, the interrupt service ends and the intermittent fault is ignored. If the fault persists, another interrupt request is generated from the ADAU1977, and the user should continue on to Step 6. 6. Repeat Step 2 through Step 4 four times. 7. If after the fifth reading, the diagnostics still report the presence of a fault, the fault exists on the respective input and must be attended to. SERIAL AUDIO DATA OUTPUT PORTS—DATA FORMAT The serial audio port comprises four pins: BCLK, LRCLK, SDATAOUT1, and SDATAOUT2. The ADAU1977 ADC outputs are available on the SDATAOUT1 and SDATAOUT2 pins in serial format. The BCLK and LRCLK pins serve as the bit clock and frame clock, respectively. The port can be operated as master or slave and can be set either in stereo mode (2-channel mode) or in TDM multichannel mode. The supported popular audio formats are I2S, left justified (LJ), right justified (RJ). Stereo Mode In 2-channel or stereo mode, the SDATAOUT1 outputs ADC data for Channel 1 and Channel 2, and the SDATOUT2 outputs ADC data for Channel 3 and Channel 4. Figure 24 through Figure 28 show the supported audio formats. Figure 24. I2S Audio Format Figure 25. LJ Audio Format Figure 26. RJ Audio Format BCLK LRCLK SDATAOUT1 (I2S MODE) SDATAOUT2 (I2S MODE) NOTES 1. SAI = 0. 2. SDATA_FMT = 0 (I2S). CHANNEL 1 CHANNEL 2 8 TO 32 BCLKs 8 TO 32 BCLKs CHANNEL 3 CHANNEL 4 BCLK LRCLK SDATAOUT1 (LJ MODE) SDATAOUT2 (LJ MODE) CHANNEL 1 CHANNEL 2 CHANNEL 3 CHANNEL 4 NOTES 1. SDATA_FMT = 1 (LJ). BCLK LRCLK SDATAOUT1 (RJ MODE) SDATAOUT2 (RJ MODE) CHANNEL 1 CHANNEL 2 CHANNEL 3 CHANNEL 4 NOTES 1. SDATA_FMT = 2 (RJ, 24-BIT). |
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