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ADAU1977WBCPZ-R7 bảng dữ liệu(PDF) 57 Page - Analog Devices |
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ADAU1977WBCPZ-R7 bảng dữ liệu(HTML) 57 Page - Analog Devices |
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57 / 64 page ![]() Data Sheet ADAU1977 Rev. A | Page 57 of 64 DIAGNOSTICS INTERRUPT PIN CONTROL REGISTER 1 Address: 0x15, Reset: 0x20, Name: DIAG_IRQ1 Table 46. Bit Descriptions for DIAG_IRQ1 Bits Bit Name Settings Description Reset Access 7 RESERVED Reserved. 0x0 RW 6 IRQ_RESET FAULT Pin Reset. 0x0 RW 0 Normal Operation 1 Reset FAULT Pin 5 IRQ_DRIVE FAULT Pin Drive Options. 0x1 RW 0 FAULT Pin Always Driven 1 FAULT Pin Only Driven During Fault, Otherwise High-Z 4 IRQ_POL FAULT Pin Polarity. 0x0 RW 0 Faults Set FAULT Pin Low 1 Faults Set FAULT Pin High 3 DIAG_MASK4 FAULT Pin Mask for All Channel 4 Faults. 0x0 RW 0 Faults on Channel 4 Trigger FAULT Pin 1 Faults on Channel 4 Do Not Trigger FAULT Pin 2 DIAG_MASK3 FAULT Pin Mask for All Channel 3 Faults. 0x0 RW 0 Faults on Channel 3 Trigger FAULT Pin 1 Faults on Channel 3 Do Not Trigger FAULT Pin 1 DIAG_MASK2 FAULT Pin Mask for All Channel 2 Faults. 0x0 RW 0 Faults on Channel 2 Trigger FAULT Pin 1 Faults on Channel 2 Do Not Trigger FAULT Pin 0 DIAG_MASK1 FAULT Pin Mask for All Channel 1 Faults. 0x0 RW 0 Faults on Channel 1 Trigger FAULT Pin 1 Faults on Channel 1 Do Not Trigger FAULT Pin |
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