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MSC8152 bảng dữ liệu(PDF) 58 Page - Freescale Semiconductor, Inc |
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MSC8152 bảng dữ liệu(HTML) 58 Page - Freescale Semiconductor, Inc |
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58 / 68 page ![]() MSC8152 Dual-Core Digital Signal Processor Data Sheet, Rev. 5 Hardware Design Considerations Freescale Semiconductor 58 3.3 Clock and Timing Signal Board Layout Considerations When laying out the system board, use the following guidelines: • Keep clock and timing signal paths as short as possible and route with 50 Ω impedance. • Use a serial termination resistor placed close to the clock buffer to minimize signal reflection. Use the following equation to compute the resistor value: Rterm = Rim – Rbuf where Rim = trace characteristic impedance Rbuf = clock buffer internal impedance. 3.4 SGMII AC-Coupled Serial Link Connection Example Figure 39 shows an example of a 4-wire AC-coupled serial link connection. For additional layout suggestions, see AN3556 MSC815x High Speed Serial Interface Hardware Design Considerations, available on the Freescale website or from your local sales office or representative. Figure 39. 4-Wire AC-Coupled SGMII Serial Link Connection Example SGMII SerDes Interface 50 Ω 50 Ω Transmitter SR[1–2]_TX[[1–2] SR[1–2]_RX[1–2] SR[1–2]_TX[1–2] SR[1–2]_RX[1–2] Receiver CTX CTX 50 Ω 50 Ω SR[1–2]_RX[1–2] SR[1–2]_RX[1–2]] Receiver Transmitter SR[1–2]_TX[1–2 ] SR[1–2]_TX[1–2] CTX CTX 50 Ω 50 Ω 50 Ω 50 Ω |
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