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TPS70751MPWPREP bảng dữ liệu(PDF) 21 Page - Texas Instruments

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tên linh kiện TPS70751MPWPREP
Giải thích chi tiết về linh kiện  DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATOR WITH POWER-UP SEQUENCING FOR SPLIT-VOLTAGE DSP SYSTEMS
PDF  41 Pages
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nhà sản xuất  TI1 [Texas Instruments]
Trang chủ  http://www.ti.com
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TPS70751MPWPREP bảng dữ liệu(HTML) 21 Page - Texas Instruments

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Application Conditions Not Shown in Block Diagram
V
OUT2
V
IN1
V
IN2
EN
SEQ
V
OUT1
V
SENSE1
Pg1
MR2
RESET
MR1
V
SENSE2
V
OUT2
V
I
V
OUT1
MR1
RESET
10 F
m
MR2
EN
>2V
<0.7V
250kW
0.1 F
m
10 F
m
TPS70751PWP
(Fixed-OutputOption)
0.1 F
m
Explanation of Timing Diagram
TPS70751-EP
DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATOR
WITH POWER-UP SEQUENCING FOR SPLIT-VOLTAGE DSP SYSTEMS
SLVS718 – DECEMBER 2006
APPLICATION INFORMATION (continued)
VIN1 and VIN2 are tied to the same fixed-input voltage greater than the VUVLO, SEQ is tied to logic high, PG1 is
tied to MR2, and MR1 is left unconnected and is, therefore, at logic high.
EN is initially high; therefore, both regulators are off and PG1 and RESET are at logic low. With SEQ at logic
high, when EN is taken to logic low, VOUT2 turns on. VOUT1 turns on after VOUT2 reaches 83% of its regulated
output voltage. When VOUT1 reaches 95% of its regulated output voltage, PG1 (tied to MR2) goes to logic high.
When both VOUT1 and VOUT2 reach 95% of their respective regulated output voltages and both MR1 and MR2
(tied to PG1) are at logic high, RESET is pulled to logic high after a 120-ms delay. When EN is returned to logic
high, both devices turn off and both PG1 (tied to MR2) and RESET return to logic low.
21
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