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MFRC63002R bảng dữ liệu(PDF) 40 Page - NXP Semiconductors |
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MFRC63002R bảng dữ liệu(HTML) 40 Page - NXP Semiconductors |
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40 / 118 page ![]() MFRC630 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.1 — 6 September 2012 227531 40 of 118 NXP Semiconductors MFRC630 Contactless reader IC 8.7.2 EEPROM memory organization The MFRC630 has implemented a EEPROM non-volatile memory with a size of 8 kB.The EEPROM is organized in pages of 64 bytes. One page of 64 bytes can be programmed at a time. Defined purposes had been assigned to specific memory areas of the EEPROM, which are called Sections. Five sections 0..4 with different purpose do exist. The following figure show the structure of the EEPROM: Table 24. EEPROM memory organization Section Page Byte addresses Access rights Memory content 0 0 00 to 31 r product information and configuration 32 to 63 r/w product configuration 1 1 to 2 64 to 191 r/w register reset 2 3 to 95 192 to 6143 r/w free 3 96 to 111 6144 to 7167 w MIFARE key 4 112 to 128 7168 to 8191 r Register Set Protocol (RSP) Fig 26. Sector arrangement of the EEPROM 001aan359 Production and config Section 0: Register reset Section 1: Free Section 2: MIFARE key area (MKA) Section 3: RSP-Area for TX Section 4_TX: RSP-Area for RX Section 4_RX: |
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