ADS5294IPFPR datasheet(42/67 Pages) TI1

42 / 67 page

H(f)

Set 1

Set 2

0.2*Fs

0.3*Fs

0.2*Fs

0.3*Fs

0.5*Fs

Set 4

Set 3

H(f)

0.1*Fs

0.15*Fs

0.075*Fs

0.125*Fs

0.225*Fs

0.275*Fs

Set 6

Set 5

H(f)

0.275*Fs

0.225*Fs

0.375*Fs

0.4*Fs 0.5*Fs f

0.35*Fs

y(n)=

x(n)+h

x(n 1)+h

x(n 2)+...+h

x(n 10)+h

x(n 11)+h

x(n 12)...+h

x(n 21)+h

x(n 22)

÷ ë

ADS5294

SLAS776B – NOVEMBER 2011 – REVISED JULY 2012

www.ti.com

By setting the register bit <ODD_TAPn> = 1, a 23-tap FIR is implemented:

(2)

In Equation 1 and Equation 2, h0, h1 …h11 are 12 bit signed representation of the coefficients, x(n) is the input

data sequence to the filter and y(n) is the filter output sequence.

A decimation filter can be introduced at the output of each channel. To enable this feature, the

GLOBAL_EN_FILTER should be set to ‘1’. Setting this bit to ‘1’ increases the overall latency of each channel to

20 clock cycles irrespective of whether the filter for that particular channel has been chosen or not (using the

USE_FILTER bit). The bits marked FILTERn_COEFF_SET<2:0>, FILTERn_RATE<2:0>, ODD_TAPn and

USE_FILTERn represent the controls for the filter for Channel n. Note that these bits are functional only when

the GLOBAL_EN_FILTER gets set to ‘1’. For illustration, the controls for channel 1 are listed in Table 5:

The USE_FILTER1 bit determines whether the filter for Channel 1 is used or not. When this bit is set to ‘1’, the

filter for channel 1 is enabled. When this bit is set to ‘0’, the filter for channel 1 is disabled but the channel data

passes through a dummy delay so that the overall latency of channel 1 is 20 clock cycles. With the

USE_FILTER1 bit set to ‘1’, the characteristics of the filter can be set by using the other sets of bits.

The ADS5294 has 6 sets of filter coefficients stored in memory. Each of these sets define a unique pass band in

the frequency domain and contain 12 coefficients (each coefficient is 12-bit long). These 12 coefficients are used

to implement either a symmetric 24-tap (even-tap) filter, or a symmetric 23-tap (odd-tap) filter. Setting the register

bit ODD_TAP1 to ‘1’ enables the odd-tap configuration (the default is even tap with this bit set to ‘0’) for Channel

1. The bits FILTER1_COEFF_SET<2:0> can be used to choose the required set of coefficients for Channel 1.

The passbands corresponding to of each of these filter coefficient sets is shown in Figure 50

Figure 50. Filter Types

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