MMA685X datasheet(13/52 Pages) FREESCALE

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Freescale Semiconductor, Inc.

MMA685x

3.1.4

Part Number Register (PN)

The part number register is a one time programmable, read only register which contains two digits of the device part number

to identify the axis and range information. The contents of this register have no impact on device operation or performance.

3.1.5

Device Control Register (DEVCTL)

The device control register is a read-write register which contains device control operations that can be applied during both

initialization and normal operation.

3.1.5.1

Reset Control (RES_1, RES_0)

A series of three consecutive register write operations to the reset control bits in the DEVCTL register will cause a device reset.

To reset the internal digital circuitry, the following register write operations must be performed in the order shown below. The reg-

ister write operations must be consecutive SPI commands in the order shown or the device will not be reset.

The response to the Register Write returns ‘0’ for RES_1 and RES_0. A Register Read of RES_1 and RES_0 returns ‘0’ and

terminates the reset sequence.

3.1.5.2

Reserved Bits (DEVCTL[5:0])

Bits 5 through 0 of the DEVCTL register are reserved. A write to the reserved bits must always be logic ‘0’ for normal device

operation and performance.

Table 6. Part Number Register

Location

Bit

Address

6543210

$08

PN[7]

PN[6]

PN[5]

PN[4]

PN[3]

PN[2]

PN[1]

PN[0]

PN Register Value

Range

Reference Section 2.4

Decimal

HEX

$33

$34

$35

$36

$37

100

$38

Table 7. Device Control Register

Location

Bit

Address

6543210

$0A

DEVCTL

RES_1

RES_0

Reserved

Reset Value

0000000

RES_1

RES_0

Effect

SPI Register Write 1

No Effect

SPI Register Write 2

No Effect

SPI Register Write 3

Device RESET

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