ADSP-BF607 datasheet(1/44 Pages) AD

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Preliminary Technical Data

Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.

Blackfin Dual Core

Embedded Processor

ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609

Rev. PrD

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel: 781.329.4700

www.analog.com

Fax: 781.461.3113

FEATURES

Dual-core symmetric high-performance Blackfin processor,

up to 500 MHz per core

Each core contains two 16-bit MACs, two 40-bit ALUs, and a

40-bit barrel shifter

RISC-like register and instruction model for ease of

programming and compiler-friendly support

Advanced debug, trace, and performance monitoring

Pipelined Vision Processor provides hardware to process sig-

nal and image algorithms used for pre- and co-processing

of video frames in ADAS or other video processing

applications

Accepts a range of supply voltages for I/O operation. See

Operating Conditions on Page 31

Off-chip voltage regulator interface

349-ball (19 mm × 19 mm) RoHS compliant BGA package

MEMORY

Each core contains 148K bytes of L1 SRAM memory (proces-

sor core-accessible) with multi-parity bit protection

Up to 256K bytes of L2 SRAM memory with ECC protection

Dynamic memory controller provides 16-bit interface to a

single bank of DDR2 or LPDDR DRAM devices

Static memory controller with asynchronous memory inter-

face that supports 8-bit and 16-bit memories

Flexible booting options from flash, eMMC and SPI memories

and from SPI, link port and UART hosts

Memory management unit provides memory protection

Figure 1. Processor Block Diagram

SYSTEM CONTROL BLOCKS

PERIPHERALS

HARDWARE

FUNCTIONS

EXTERNAL

BUS

INTERFACES

LPDDR

DDR2

CRC

PIPELINED

VISION PROCESSOR

PIXEL

COMPOSITOR

DMA SYSTEM

3× PPI

4× LINK PORT

2× EMAC

WITH

2× IEEE 1588

EMMC/RSI

3× SPORT

2× SPI

2× UART

1× CAN

8× TIMER

2× PWM

1× COUNTER

2× TWI

USB 2.0 HS OTG

L2 MEMORY

256K BYTE

ECC-

PROTECTED

SRAM

32K BYTE

ROM

112

GP

I/O

FLASH

SRAM

EMULATOR

TEST & CONTROL

PLL & POWER

MANAGEMENT

FAULT

MANAGEMENT

EVENT

CONTROL

DUAL

WATCHDOG

CORE 1

148K BYTE

PARITY BIT PROTECTED

L1 SRAM

INSTRUCTION/DATA

B

1× ACM

16

DYNAMIC

MEMORY

CONTROLLER

STATIC

MEMORY

CONTROLLER

VIDEO

SUBSYSTEM

CORE 0

148K BYTE

PARITY BIT PROTECTED

L1 SRAM

INSTRUCTION/DATA

B

Số phần tương tự - ADSP-BF607

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	ADSP-BF607	3Mb / 112P	Blackfin Dual Core Embedded Processor REV. 0
	ADSP-BF607	3Mb / 112P	Blackfin Dual Core Embedded Processor REV. 0
	ADSP-BF607BBCZ-5	3Mb / 112P	Blackfin Dual Core Embedded Processor REV. 0
	ADSP-BF607KBCZ-5	3Mb / 112P	Blackfin Dual Core Embedded Processor REV. 0

More results

Mô tả tương tự - ADSP-BF607

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Analog Devices	ADSP-BF531	671Kb / 56P	Blackfin Embedded Processor 3/04-Revision 0
	ADSP-BF538	3Mb / 56P	Blackfin Embedded Processor May-2006
	ADSP-BF539	2Mb / 68P	Blackfin Embedded Processor Sep-2006
	ADSP-BF534	1Mb / 68P	Blackfin Embedded Processor Rev. E
	ADSP-BF608BBCZ-5	3Mb / 112P	Blackfin Dual Core Embedded Processor REV. 0
	ADSP-BF516BSWZ-4	2Mb / 68P	Blackfin Embedded Processor REV. B
	ADSP-BF533SBBC-500	2Mb / 64P	Blackfin Embedded Processor Rev. I
	ADSP-BF607BBCZ-5	3Mb / 112P	Blackfin Dual Core Embedded Processor REV. 0
List of Unclassifed Man...	100-1214-1	440Kb / 2P	Blackfin Core Module
Analog Devices	ADSP-BF538	3Mb / 60P	Blackfin Embedded Processor Rev. E

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