R5F10RF8AFP datasheet(53/76 Pages) RENESAS

tên linh kiện	R5F10RF8AFP

Giải thích chi tiết về linh kiện	Integrated LCD controller/driver, True Low Power Platform (as low as 75 關A/MHz, and 0.64 關A for RTC LVD), 1.6 V to 5.5 V operation, 8 to 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications

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nhà sản xuất	RENESAS [Renesas Technology Corp]

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RL78/L12

2. ELECTRICAL SPECIFICATIONS (TARGET)

Page 53 of 73

R01DS0157EJ0001 Rev.0.01

2012.02.20

Under development

Preliminary document

Specifications in this document are tentative and subject to change.

Caution

The pins mounted depend on the product.

Refer to 1.3.1

32-pin products to 1.3.5

64-pin

products.

2.5.2 Serial interface IICA

(TA =

−40 to +85°C, 1.6 V ≤ EVDD = VDD ≤ 5.5 V, VSS = EVSS = 0 V)

Standard

Mode

Fast Mode

Plus

Parameter

Symbol

Conditions

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

Unit

Fast mode plus:

fCLK

≥ 10 MHz

2.7 V

≤ EVDD ≤ 5.5 V

1000

kHz

Fast mode:

fCLK

≥ 3.5 MHz

1.8 V

≤ EVDD ≤ 5.5 V

400

kHz

SCLA0 clock frequency

fSCL

Normal mode:

fCLK

≥ 1 MHz

1.6 V

≤ EVDD ≤ 5.5 V

100

kHz

Setup time of restart condition

Note 1

tSU:STA

4.7

0.6

0.26

μs

Hold time

tHD:STA

4.0

0.6

0.26

μs

Hold time when SCLA0 = “L”

tLOW

4.7

1.3

0.5

μs

Hold time when SCLA0 = “H”

tHIGH

4.0

0.6

0.26

μs

Data setup time (reception)

tSU:DAT

250

100

Data hold time (transmission)

Note 2

tHD:DAT

3.45

0.9

μs

Setup time of stop condition

tSU:STO

4.0

0.6

0.26

μs

Bus-free time

tBUF

4.7

1.3

0.5

μs

Notes 1.

The first clock pulse is generated after this period when the start/restart condition is detected.

The maximum value (MAX.) of tHD:DAT is during normal transfer and a wait state is inserted in the ACK

(acknowledge) timing.

Remark

The maximum value of Cb (communication line capacitance) and the value of Rb (communication line

pull-up resistor) at that time in each mode are as follows.

Standard mode: Cb = 400 pF, Rb = 2.7 k

Fast mode:

Cb = 320 pF, Rb = 1.1 k

Fast mode plus: Cb = 120 pF, Rb = 1.1 k

IICA serial transfer timing

tLOW

tHIGH

tHD:STA

Stop

condition

Start

condition

Restart

condition

Stop

condition

tSU:DAT

tSU:STA

tSU:STO

tHD:STA

tHD:DAT

SCL0

SDA0

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