R5F10RF8AFP datasheet(42/76 Pages) RENESAS

42 / 76 page

RL78/L12

2. ELECTRICAL SPECIFICATIONS (TARGET)

Page 42 of 73

R01DS0157EJ0001 Rev.0.01

2012.02.20

Under development

Preliminary document

Specifications in this document are tentative and subject to change.

Notes 6.

Use it with EVDD

≥ Vb.

The smaller maximum transfer rate derived by using fMCK/6 or the following expression is the valid

maximum transfer rate.

Expression for calculating the transfer rate when 1.8 V

≤ EVDD < 3.3 V and 1.6 V ≤ Vb ≤ 2.0 V

Maximum transfer rate =

[bps]

{

−Cb × Rb × ln (1 −

1.5

Vb )} × 3

Transfer rate

× 2 − {−C

× Rb × ln (1

−

1.5

Vb )}

Baud rate error (theoretical value) =

× 100 [%]

(

Transfer rate ) × Number of transferred bits

* This value is the theoretical value of the relative difference between the transmission and reception sides.

This value as an example is calculated when the conditions described in the “Conditions” column are

met.

Refer to Note 7 above to calculate the maximum transfer rate under conditions of the customer.

Caution

Select the TTL input buffer for the RxDq pin and the N-ch open drain output (VDD tolerance) mode

for the TxDq pin by using port input mode register g (PIMg) and port output mode register g

(POMg).

Remarks 1.

Rb[

Ω]:Communication line (TxDq) pull-up resistance,

Cb[F]: Communication line (TxDq) load capacitance, Vb[V]: Communication line voltage

q: UART number (q = 0, 1), g: PIM and POM number (g = 1)

fMCK: Serial array unit operation clock frequency

(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn).

m: Unit number, n: Channel number (mn = 00, 01))

4. VIH and VIL below are observation points for the AC characteristics of the serial array unit when

communicating at different potentials in UART mode.

4.0 V

≤ EVDD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V: VIH = 2.2 V, VIL = 0.8 V

2.7 V

≤ EVDD < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V: VIH = 2.0 V, VIL = 0.5 V

1.8 V

≤ EVDD < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V: VIH = 1.50 V, VIL = 0.32 V

UART mode connection diagram (during communication at different potential)

User's device

TxDq

RxDq

RL78/L12

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