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PIC32MX795F512LT-80I/PF bảng dữ liệu(PDF) 119 Page - Microchip Technology |
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PIC32MX795F512LT-80I/PF bảng dữ liệu(HTML) 119 Page - Microchip Technology |
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119 / 256 page ![]() © 2009-2011 Microchip Technology Inc. DS61156G-page 119 PIC32MX5XX/6XX/7XX 6.0 RESETS The Reset module combines all Reset sources and controls the device Master Reset signal, SYSRST. The following is a list of device Reset sources: • POR: Power-on Reset •MCLR: Master Clear Reset pin • SWR: Software Reset • WDTR: Watchdog Timer Reset • BOR: Brown-out Reset • CMR: Configuration Mismatch Reset A simplified block diagram of the Reset module is illustrated in Figure 6-1. FIGURE 6-1: SYSTEM RESET BLOCK DIAGRAM Note 1: This data sheet summarizes the features of the PIC32MX5XX/6XX/7XX family of devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to Section 7. “Resets” (DS61118) in the “PIC32 Family Reference Manual”, which is available from the Microchip web site (www.microchip.com/PIC32). 2: Some registers and associated bits described in this section may not be available on all devices. Refer to Section 4.0 “Memory Organization” in this data sheet for device-specific register and bit information. MCLR VDD VDD Rise Detect POR Sleep or Idle Brown-out Reset WDT Time-out Glitch Filter BOR Configuration SYSRST Software Reset Power-up Timer Voltage Enabled Reset WDTR SWR CMR MCLR Mismatch Regulator |
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