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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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L9803 bảng dữ liệu(PDF) 70 Page - STMicroelectronics |
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L9803 bảng dữ liệu(HTML) 70 Page - STMicroelectronics |
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70 / 126 page  On-Chip Peripherals L9803 70/126 Figure 35. Block diagram of the Analog to Digital Converter 5.5.3 Input Selections and Sampling The input section of the ADC includes the analog multiplexer and a buffer. The input of the buffer is permanently connected to the multiplexer output. The buffer output is fed to the sample and hold circuit. The multiplexer is driven with CH1 and CH0 bit only after ADST is set. Starting from this event, the sampler follows the selected input signal for 2.5us and then holds it for the remaining conversion time (i.e. when the conversion is actually running). 5.5.4 Interrupt Management If ADIE bit is set in register ADCCSR, an interrupt is generated when a conversion is completed (i.e. when COCO is set). The interrupt request is cleared when any of the ADC registers is access (either read or write). Enabling/disabling the interrupt generation while the conversion is running has no effect on the current conversion. ADIE value is latched when ADST is set and this internal value holds all the conversion time long. 5.5.5 Temperature Sensing The AD1 input is internally connected to the output of a temperature sensing circuit. CH0 CH1 ADST logic U X M d i v clk 8Mhz 2 Mhz start conversion ..... AD0 AD9 DRH DRL end conversion WR Vin VCC AGND inputs CSR sampling + conversion latch ADIE |
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