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PSD4235G2-12UT bảng dữ liệu(PDF) 40 Page - STMicroelectronics |
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PSD4235G2-12UT bảng dữ liệu(HTML) 40 Page - STMicroelectronics |
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40 / 124 page ![]() Programming Flash memory PSD4235G2V 40/124 Figure 5. Data polling flowchart 8.2 Data toggle Checking the Toggle Flag bit (DQ6/DQ14) is another method of determining whether a Program or Erase cycle is in progress or has completed. Figure 6 shows the Data Toggle algorithm. When the MCU issues a Program instruction, the embedded algorithm within the PSD begins. The MCU then reads the location to be programmed in Flash memory to check the status. The Toggle Flag bit (DQ6/DQ14) toggles each time the MCU reads this location until the embedded algorithm is complete. The MCU continues to read this location, checking the Toggle Flag bit (DQ6/DQ14) and monitoring the Error Flag bit (DQ5/DQ13). When the Toggle Flag bit (DQ6/DQ14) stops toggling (two consecutive READs yield the same value), and the Error Flag bit (DQ5/DQ13) remains 0, the embedded algorithm is complete. If the Error Flag bit (DQ5/DQ13) is 1, the MCU should test the Toggle Flag bit (DQ6/DQ14) again, READ DQ5 and DQ7 (DQ13 and DQ15) at Valid Even Address START READ DQ7 (DQ15) Program or Erase Cycle failed Program or Erase Cycle is complete AI04920 Yes No Yes No DQ5 (DQ13) = 1 DQ7 (DQ15) = Data7 (Data15) Yes No Issue RESET instruction DQ7 (DQ15) = Data7 (Data15) |
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