PSD4235G2-12UT datasheet(90/124 Pages) STMICROELECTRONICS

90 / 124 page

Power management

PSD4235G2V

90/124

20.1

Automatic Power-down (APD) Unit and Power-down mode

The APD Unit, shown in Figure 31, puts the PSD into Power-down mode by monitoring the

activity of Address Strobe (ALE/AS, PD0). If the APD Unit is enabled, as soon as activity on

Address Strobe (ALE/AS, PD0) stops, a four-bit counter starts counting. If Address Strobe

(ALE/AS, PD0) remains inactive for fifteen clock periods of CLKIN (PD1), Power-down

(PDN) goes high, and the PSD enters Power-down mode, as discussed next.

20.2

Power-down mode

By default, if you enable the APD Unit, Power-down mode is automatically enabled. The

device enters Power-down mode if Address Strobe (ALE/AS, PD0) remains inactive for

fifteen periods of CLKIN (PD1).

The following should be kept in mind when the PSD is in Power-down mode:

●

If Address Strobe (ALE/AS, PD0) starts pulsing again, the PSD returns to normal

operation. The PSD also returns to normal operation if either PSD Chip Select input

(CSI, PD2) is low or the Reset (RESET) input is high.

●

The MCU address/data bus is blocked from all memory and PLDs.

●

Various signals can be blocked (prior to Power-down mode) from entering the PLDs by

setting the appropriate bits in the Power Management Mode registers (PMMR). The

blocked signals include MCU control signals and the common CLKIN (PD1). Note that

blocking CLKIN (PD1) from the PLDs does not block CLKIN (PD1) from the APD Unit.

●

All PSD memories enter Standby mode and are drawing standby current. However, the

PLDs and I/O ports blocks do not go into Standby mode because you do not want to

have to wait for the logic and I/O to “wakeup” before their outputs can change. See

Table 47 for Power-down mode effects on PSD ports.

●

Typical standby current is or the order of µA. This standby current value assumes that

there are no transitions on any PLD input.

Table 47.

Effect of Power-down mode on ports

Port function

Pin level

MCU I/O

No Change

PLD Out

No Change

Address Out

Undefined

Data port

Tri-State

Peripheral I/O

Tri-State

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