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PIC16F1934-E/ML bảng dữ liệu(PDF) 83 Page - Microchip Technology |
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PIC16F1934-E/ML bảng dữ liệu(HTML) 83 Page - Microchip Technology |
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83 / 418 page ![]() © 2008 Microchip Technology Inc. Preliminary DS41364A-page 81 PIC16F193X/LF193X 5.0 LOW DROPOUT (LDO) VOLTAGE REGULATOR The PIC16F193X devices differ from the PIC16LF193X devices due to an internal Low Dropout (LDO) voltage regulator. The PIC16F193X contain an internal LDO, while the PIC16LF193X do not. The lithography of the die allows a maximum operating voltage of 3.6V on the internal digital logic. In order to continue to support 5.0V designs, a LDO voltage regulator is integrated on the die. The LDO voltage regulator allows for the internal digital logic to operate at 3.2V, while I/O’s operate at 5.0V (VDD). The LDO voltage regulator requires an external bypass capacitor for stability. One of three pins, denoted as VCAP, can be configured for the external bypass capacitor. It is recommended that the capacitor be a ceramic cap between 0.1 to 1.0 µF. On power-up, the external capacitor will look like a large load on the LDO voltage regulator. To prevent erroneous operation, the device is held in Reset while a constant current source charges the external capacitor. After the cap is fully charged, the device is released from Reset. For more information, refer to Section 28.0 “Electrical Specifications”. See Configuration Word 2 register (Register 10-2) for VCAP enable bits. |
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