PIC16F1934-ESLASHML datasheet(200/418 Pages) MICROCHIP

200 / 418 page

PIC16F193X/LF193X

DS41364A-page 198

Preliminary

19.6.1

HALF-BRIDGE MODE

In Half-Bridge mode, two pins are used as outputs to

drive push-pull loads. The PWM output signal is output

on the CCPx/P1A pin, while the complementary PWM

output

signal

output

the

P1B

(see

Figure 19-9). This mode can be used for Half-Bridge

applications, as shown in Figure 19-9, or for Full-Bridge

applications, where four power switches are being

modulated with two PWM signals.

In Half-Bridge mode, the programmable dead-band delay

can be used to prevent shoot-through current in

Half-Bridge power devices. The value of the PDC<6:0>

bits of the PWMxCON register sets the number of

instruction cycles before the output is driven active. If the

value is greater than the duty cycle, the corresponding

output remains inactive during the entire cycle. See

Section 19.6.6 “Programmable Dead-Band Delay

Mode” for more details of the dead-band delay

operations.

Since the P1A and P1B outputs are multiplexed with

the PORT data latches, the associated TRIS bits must

be cleared to configure P1A and P1B as outputs.

FIGURE 19-8:

EXAMPLE OF

HALF-BRIDGE PWM

OUTPUT

FIGURE 19-9:

EXAMPLE OF HALF-BRIDGE APPLICATIONS

Period

Pulse Width

(1)

P1A(2)

P1B(2)

td = Dead-Band Delay

Period

(1)

Note 1:

At this time, the TMRx register is equal to the

PRx register.

Output signals are shown as active-high.

P1A

P1B

FET

Driver

FET

Driver

Load

FET

Driver

FET

Driver

V+

Load

FET

Driver

FET

Driver

P1A

P1B

Standard Half-Bridge Circuit (“Push-Pull”)

Half-Bridge Output Driving a Full-Bridge Circuit

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