PIC18F23K20-ESLASHML datasheet(63/456 Pages) MICROCHIP

63 / 456 page

 2010 Microchip Technology Inc.

DS41303G-page 63

PIC18F2XK20/4XK20

CM2CON1

PIC18F2XK20

PIC18F4XK20

0000 ----

uuuu ----

SLRCON

PIC18F2XK20

PIC18F4XK20

---1 1111

---u uuuu

SSPMSK

PIC18F2XK20

PIC18F4XK20

1111 1111

uuuu uuuu

TABLE 4-4:

INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets,

WDT Reset,

RESET

Instruction,

Stack Resets

Wake-up via WDT

or Interrupt

Legend:

= unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector

(0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with

the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.

See Table 4-3 for Reset value for specific condition.

Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as

PORTA pins, they are disabled and read ‘0’.

All bits of the ANSELH register initialize to ‘0’ if the PBADEN bit of CONFIG3H is ‘0’.

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