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TMP320C6720RFP300 bảng dữ liệu(PDF) 64 Page - Texas Instruments |
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TMP320C6720RFP300 bảng dữ liệu(HTML) 64 Page - Texas Instruments |
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64 / 118 page ![]() 4.12.3 UHPI Electrical Data/Timing 4.12.3.1 Universal Host-Port Interface (UHPI) Read and Write Timing TMS320C6727B, TMS320C6726B, TMS320C6722B, TMS320C6720 Floating-Point Digital Signal Processors SPRS370E – SEPTEMBER 2006 – REVISED JULY 2008 www.ti.com Table 4-17 and Table 4-18 assume testing over recommended operating conditions (see Figure 4-21 through Figure 4-24). Table 4-17. UHPI Read and Write Timing Requirements(1)(2) NO. MIN MAX UNIT 9 tsu(HASL-DSL) Setup time, UHPI_HAS low before DS falling edge 5 ns 10 th(DSL-HASL) Hold time, UHPI_HAS low after DS falling edge 2 ns 11 tsu(HAD-HASL) Setup time, HAD valid before UHPI_HAS falling edge 5 ns 12 th(HASL-HAD) Hold time, HAD valid after UHPI_HAS falling edge 5 ns 13 tw(DSL) Pulse duration, DS low 15 ns 14 tw(DSH) Pulse duration, DS high 2P ns 15 tsu(HAD-DSL) Setup time, HAD valid before DS falling edge 5 ns 16 th(DSL-HAD) Hold time, HAD valid after DS falling edge 5 ns 17 tsu(HD-DSH) Setup time, HD valid before DS rising edge 5 ns 18 th(DSH-HD) Hold time, HD valid after DS rising edge 0 ns 37 tsu(HCSL-DSL) Setup time, UHPI_HCS low before DS falling edge 0 ns 38 th(HRDYL-DSH) Hold time, DS high after UHPI_HRDY falling edge 1 ns (1) P = SYSCLK2 period (2) DS refers to HSTROBE. HD refers to UHPI_HD[31:0]. HDS refers to UHPI_HDS[1] or UHPI_HDS[2]. HAD refers to UHPI_HCNTL[0], UHPI_HCNTL[1], UHPI_HHWIL, and UHPI_HRW. Peripheral and Electrical Specifications 64 Submit Documentation Feedback |
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