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SE97BTP bảng dữ liệu(PDF) 8 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  DDR memory module temp sensor with integrated SPD
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SE97BTP bảng dữ liệu(HTML) 8 Page - NXP Semiconductors

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SE97B_1
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 27 January 2010
8 of 53
NXP Semiconductors
SE97B
DDR memory module temp sensor with integrated SPD
[1]
Between Tamb ≥ Tth(crit) and Tamb < Tth(crit) − Thys the EVENT output is in Comparator mode and bit 0 of CONFIG (EVENT output mode)
is ignored.
Refer to Table 4 for figure note information.
Fig 4.
EVENT output condition
002aae763
time
temperature (
°C)
critical
EVENT in Interrupt mode
EVENT in Comparator mode
software interrupt clear
Lower Boundary Alarm
Upper Boundary Alarm
EVENT in ‘Critical Temp only’ mode
(1)
(2)
(1) (3)
(4)
(3)(5)
(7)
(6) (4)
(2)
Tamb
Ttrip(l) − Thys
Ttrip(u) − Thys
Tth(crit) − Thys
Ttrip(u) − Thys
Ttrip(l) − Thys
Table 4.
EVENT output condition
Figure
note
EVENT output boundary
conditions
EVENT output
Temperature Register Status bits
Comparator
mode
Interrupt
mode
Critical Temp
only mode
Bit 15
Above
Critical
Trip
Bit 14
Above
Alarm
Window
Bit 13
Below
Alarm
Window
(1)
Tamb ≥ Ttrip(l)
HLH
0
0
0
(2)
Tamb < Ttrip(l) − Thys
LL
H
0
0
1
(3)
Tamb > Ttrip(u)
LL
H
0
1
0
(4)
Tamb ≤ Ttrip(u) − Thys
HLH
0
0
0
(5)
Tamb ≥ Tth(crit)
LL
L
1
1
0
(6)
Tamb < Tth(crit) − Thys
LH
H
0
1
0
(7)
Table note [1]



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