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SE97BTP bảng dữ liệu(PDF) 21 Page - NXP Semiconductors |
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SE97BTP bảng dữ liệu(HTML) 21 Page - NXP Semiconductors |
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21 / 53 page ![]() SE97B_1 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 01 — 27 January 2010 21 of 53 NXP Semiconductors SE97B DDR memory module temp sensor with integrated SPD 7.10.3.3 Sequential read If the master acknowledges the first data byte transmitted by the SE97B, then the device will continue transmitting as long as each data byte is acknowledged by the master (Figure 17). If the end of memory is reached during sequential Read, the address counter will ‘wrap around’ to the beginning of memory, and so on. Sequential Read works with either ‘Immediate Address Read’ or ‘Selective Read’, the only difference being the starting byte address. Fig 17. Sequential read timing 0 1 0 A2 A1 A0 1 A S 1 A slave address (memory) START condition R/W acknowledge from slave acknowledge from master data from memory SDA data from memory DATA n + 1 A acknowledge from master 002aab253 P STOP condition data from memory DATA n + X A no acknowledge from master DATA n |
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