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ATmega1284P bảng dữ liệu(PDF) 192 Page - ATMEL Corporation |
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ATmega1284P bảng dữ liệu(HTML) 192 Page - ATMEL Corporation |
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192 / 380 page ![]() 192 8059D–AVR–11/09 ATmega1284P • Bits 5:4 – UPMn1:0: Parity Mode These bits enable and set type of parity generation and check. If enabled, the Transmitter will automatically generate and send the parity of the transmitted data bits within each frame. The Receiver will generate a parity value for the incoming data and compare it to the UPMn setting. If a mismatch is detected, the UPEn Flag in UCSRnA will be set. • Bit 3 – USBSn: Stop Bit Select This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores this setting. • Bit 2:1 – UCSZn1:0: Character Size The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits (Character SiZe) in a frame the Receiver and Transmitter use. Table 17-5. UPMn Bits Settings UPMn1 UPMn0 Parity Mode 0 0 Disabled 01 Reserved 1 0 Enabled, Even Parity 1 1 Enabled, Odd Parity Table 17-6. USBS Bit Settings USBSn Stop Bit(s) 01-bit 12-bit Table 17-7. UCSZn Bits Settings UCSZn2 UCSZn1 UCSZn0 Character Size 000 5-bit 001 6-bit 010 7-bit 011 8-bit 100 Reserved 101 Reserved 110 Reserved 111 9-bit |
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